1. Field of the Invention
The present invention relates generally to input/output circuits in integrated circuits (ICs), and more particularly to an apparatus and method for adjusting output buffer driver characteristics with a serial communication link between the control logic and each output buffer driver in the system.
2. Description of the Related Art
In an integrated circuit, input/output buffer circuits are often provided between the integrated circuit and the external environment, i.e., the system in which the integrated circuit is placed. The buffer circuits interface input/output signals to/from the external environment, typically a system bus or interconnect cable. Two characteristics of buffer circuits are slew rate (sometimes called edge rate) and buffer driver strength. The slew rate of a buffer is the rate of change of a voltage signal furnished at the output terminal of the buffer with respect to time. The buffer drive strength is the current/voltage characteristic of an output device of the buffer in producing the particular voltage level of an output signal. The drive strength of the buffer and the slew rate are chosen to meet the characteristics of the circuitry with which the buffer is associated.
Output buffer circuits are generally used in semi-conductor memory devices such as dynamic random access memory (DRAM), static random access memory (SRAM), read only memory (ROM) and the like.
In high-speed signaling systems, an output buffer calibration scheme is utilized to reduce timing uncertainties in these systems. In a bussed system, i.e., a system where there are several different devices that may drive the bus or where there are several different devices that drive a portion of a wide bus, output buffer calibration schemes are particularly important to reduce timing uncertainties. Calibrated output drivers in the buffer circuits reduce the timing uncertainty by matching drivers from one device to another, by matching the characteristics of the pull-up transistor, i.e., the transistor that drives a high voltage, to the characteristics of the pull-down transistor, by setting an effective output impedance that helps to back-terminate transmission line reflections in the bus system, and by limiting the output voltage slew rates to improve the signal integrity. Some of the benefits obtained by calibrated output buffers can be achieved by closely specifying the driver characteristics for all devices in the system. Techniques such as specifying minimum and maximum output currents, specifying the current versus voltage curves with minimum and maximum limits, and providing limits on the minimum and maximum slew rates have been used.
A problem with the above described calibration techniques is that they are unable to adjust for the effects of manufacturing process variances, applied voltage variations and/or temperature variations. As such, active calibration schemes that can further reduce the timing uncertainty by adjusting for the effects of process variance, voltage variation and/or temperature variation have been developed. Multiple drivers of a device can be adjusted simultaneously by providing the same adjustment commands to all drivers, or by providing an adjustment value that is used by all drivers. A further level of timing accuracy can be obtained by adjusting each driver independently of the others. With this method, drive strength differences between transistors on a device can be compensated for, and differences in transistor power and ground differences, typically caused by IR drops on the power or ground bus, can also be compensated for.
There are problems, however, with the conventional independent driver calibration schemes. Since each driver is independently calibrated, additional complex control logic for each driver is required, thus increasing the cost and size of the integrated circuit. Additionally, the number of control lines necessary to address each driver on the device can be large in some applications, such as bus controllers or memory controllers, thus further increasing the cost and size of the integrated circuit.
Thus, there exists a need for an apparatus and method for independently calibrating the characteristics of multiple output drivers of an integrated circuit that does not require significant additional circuitry to implement.